The STM32F407ZGT6 is based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 168 MHz. The Cortex-M4
core features a Floating point unit (FPU) single precision which supports all Arm singleprecision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.
The STM32F407ZGT6 incorporates high-speed embedded memories (Flash memory up to 1 Mbyte, up to 192 Kbytes of SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.
All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers. a true random number generator (RNG). They also feature standard and advanced communication interfaces.
• Up to three I2Cs
• Three SPIs, two I2Ss full duplex. To achieve audio class accuracy, the I2S peripherals can be clocked via a dedicated internal audio PLL or via an external clock to allow synchronization.
• Four USARTs plus two UARTs
• An USB OTG full-speed and a USB OTG high-speed with full-speed capability (with the ULPI),
• Two CANs
• An SDIO/MMC interface
• Ethernet and the camera interface available on STM32F407xx devices only
The STM32F407ZGT6microcontroller suitable for a wide range of applications :
• Motor drive and application control
• Medical equipment
• Industrial applications: PLC, inverters, circuit breakers
• Printers, and scanners
• Alarm systems, video intercom, and HVAC
• Home audio appliances
Features :
• Core: Arm® 32-bit Cortex®-M4 CPU with FPU,Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz,memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memories
– Up to 1 Mbyte of Flash memory
– Up to 192+4 Kbytes of SRAM including 64- Kbyte of CCM (core coupled memory) data RAM
– 512 bytes of OTP memory
– Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories
• LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
– 1.8 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1% accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
• Low-power operation
– Sleep, Stop and Standby modes
– VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM
• 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
• 2×12-bit D/A converters
• General-purpose DMA: 16-stream DMA controller with FIFOs and burst
Support Up to 17 timers: up to twelve 16-bit and two 32- bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
• Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex-M4 Embedded Trace Macrocell™
• Up to 140 I/O ports with interrupt capability
– Up to 136 fast I/Os up to 84 MHz
– Up to 138 5 V-tolerant I/Os
• Up to 15 communication interfaces
– Up to 3 × I2C interfaces (SMBus/PMBus)
– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control)
– Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock
– 2 × CAN interfaces (2.0B Active)
– SDIO interface
• Advanced connectivity
– USB 2.0 full-speed device/host/OTG controller with on-chip PHY
– USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
The stm32f407zgt6 embed a nested vectored interrupt controller able to manage 16 priority levels, and handle up to 82 maskable interrupt channels plus the 16 interrupt lines of the Cortex®-M4 with FPU core.
• Closely coupled NVIC gives low-latency interrupt processing
• Interrupt entry vector table address passed directly to the core
• Allows early processing of interrupts
• Processing of late arriving, higher-priority interrupts
• Support tail chaining
• Processor state automatically saved
• Interrupt entry restored on interrupt exit with no instruction overhead
This hardware block provides flexible interrupt management features with minimum interrupt latency.
The stm32f407zgt6 support three low-power modes to achieve the best compromise between low-power consumption, short startup time and available wakeup sources:
• Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU when an interrupt/event occurs.
• Stop mode
The Stop mode achieves the lowest power consumption while retaining the contents of SRAM and registers. All clocks in the V12 domain are stopped, the PLL, the HSI RC and the HSE crystal oscillators are disabled. The voltage regulator can also be put either in normal or in low-power mode.
The device can be woken up from the Stop mode by any of the EXTI line (the EXTI line source can be one of the 16 external lines, the PVD output, the RTC alarm / wakeup / tamper / time stamp events, the USB OTG FS/HS wakeup or the Ethernet wakeup).
• Standby mode
The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is switched off so that the entire V12 domain is powered off. The PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering Standby mode, the SRAM and register contents are lost except for registers in the backup domain and the backup SRAM when selected.
The device exits the Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pin, or an RTC alarm / wakeup / tamper /time stamp event occurs.
The standby mode is not supported when the embedded voltage regulator is bypassed and the V12 domain is controlled by an external power.
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