After Intel announced its IDM 2.0 strategy, TSMC quickly announced its latest capital expenditure plans, including in-house production, outsourcing and foundry operations, and largely reaffirmed TSMC's confidence in its short- and long-term prospects going forward.
In terms of manufacturing technology, TSMC has recently repeatedly reiterated that it is confident that its N2, N3 and N4 processes will be launched on time and are more advanced than those of other competitors.
At the beginning of 2022, TSMC pointed out that it will significantly increase its capital expenditure budget to 25-28 billion US dollars, and will further increase it to about 30 billion US dollars in the future, reaching its total production capacity and R&D expenditures within three years. The plan is 100 billion US dollars.
About 80% of TSMC's $30 billion capital budget this year will be used to expand production capacity for advanced technologies such as 3nm, 4nm/5nm and 6nm/7nm. Analysts believe that by the end of 2022, most of the funds on advanced nodes will be used to expand TSMC's N5 capacity, which will refer to 110,000 to 120,000 wafer starts per month (WSPM).
TSMC also said that 10% of its capital expenditure will be used for advanced packaging and mask manufacturing, and another 10% will be used for specialized technologies (including custom versions of mature nodes).
"TSMC, as a leading pure-play foundry, has never lacked competition in its more than 30-year history, but we know how to compete," TSMC's president and CEO said on a recent analyst and investor conference call. ", "We will continue to focus on delivering technological leadership, manufacturing excellence and earning the trust of our customers. Finally, customer trust is very important because we don't have an in-house product that competes with our customers. "
For TSMC, the world's largest foundry with nearly 500 customers, that's what makes them unique. On the one hand, the company can accept any customer in need; on the other hand, in terms of capability and technology, the only way out is to be ahead of other competitors. In terms of production capacity, TSMC has always been considered to have no rivals in the world, even in the next few years.
TSMC is the first company in the world to begin high-volume production (HVM) of chips using its N5 (5 nm) process technology in mid-2020.
Initially, the node was only available to TSMC's alpha customers - Apple and HiSilicon. After Apple stopped shipping to HiSilicon on September 14, all leading process capacity was left to Apple. So far, adoption of the node is growing as more customers are ready to use the N5 design. At the same time, TSMC also said that more customers have plans to use the N5 series technology (including N5, N5P and N4) in the future than expected a few months ago.
"N5 has entered its second year of mass production, and the output is better than our original plan," TSMC CEO said, driven by smartphone and HPC applications, N5 demand continues to be strong, "We expect N5 to contribute about 20% of the total in 2021. Wafer revenue. […] In fact, we’re seeing more and more 5nm and 3nm customers getting involved [compared to 7nm in the same category]. Their engagement is very high and we have to prepare for that.”
"For the full year of fiscal 2021, we now forecast a growth rate of about 16% for the foundry industry," TSMC's CFO said on a recent conference call with analysts and investors, adding that TSMC expressed "confidence that it will be able to outperform foundry revenue growth. , growth will be around 20% in fiscal 2021.”
"Driven by strong demand from smartphones and high-performance computing applications, we expect demand for the N5 series to continue to grow in the next few years," said the head of TSMC. "Not only do we expect to see the first wave of high-performance computing, And there will be more waves of demand to support our leading [N5] nodes.”
TSMC's N5 technology family also includes the evolved N4 process, which will enter risk production later this year and mass production later in 2022. Compared to N5, the technology is designed to provide higher PPA (power, performance, area) advantages, but maintain the same design rules, design infrastructure, SPICE simulator and IP. At the same time, as N4 further expands the use of EUV lithography tools, it also reduces the number of masks, process steps, risks and costs.
Another thing to watch in 2022 is that TSMC will introduce a new N3 manufacturing process that will continue to use FinFET transistors, but expect a significant increase in PPA. Especially compared with the current N5 process, TSMC's N3 promises 10%~15% performance improvement (under the same power consumption and complexity), or 25%~30% lower power consumption (under the same performance and complexity) At the same time, the new node will also increase the transistor density by 1.1 to 1.7 times depending on the structure (1.1 times for analog, 1.2 times for SRAM, and 1.7 times for logic).
"For advanced CMOS logic, TSMC's 3nm and 2nm CMOS nodes are progressing well," TSMC said in its most recent annual report, adding that TSMC has stepped up exploratory R&D efforts to focus on nodes beyond 2nm and 3D transistors, new Memory and low-R interconnects, which provide a solid foundation for many technology platforms.
TSMC knows how to compete with leading node and chip makers focused on specialized process technologies, so it doesn't directly conflict with Intel's foundry services (IFS), which focus on edge and advanced nodes. It is worth noting that TSMC is expanding the R&D and operation capabilities of Fab 12, and is currently developing more advanced nodes such as N3 and N2.
